Scirocco and VirSim - A Logic Simulation Tool
Authors: Jeannette Djigbenou and Jina Kim
This tutorial shows a logic simulation process for a 4-bit counter, which is described in the behavioral level. You must have setup your unix environment before this!!!
Copy example a 4-bit counter and a test bench for the counter into your working directory.
Create subdirectory named 'work' under your current directory. All intermediate files will be stored under the directory.
Analysis of the Behavioral Model
Execute the following commands.
Simulation of the Behavioral Model
Execute the following command
CFG_TB_CNT_BHV is the name of testbench configuration.
Simulator Invocation Dialog window appears.
Click on OK button.
VirSim Interactive window appear.
Click Hierarchy button on VirSim Interactive Window->Window->Hierarchy
VirSim Hierarchy window appears.
Click TB_CNT_BHV (testbench entity name) button in Hierarchy session.
All the signals in your counter design will appear in Signal Select session.
Click Waveform on VirSim Interactive window->Window->Waveform.
VirSim Waveform window appears.
Select all the signals in Signal Select session on Hierarchy window, and then click Add button.
You may have some ‘trailing 0’ error messages.
Disregard these messages.
All the selected signals appear on Waveform window.
Click button in VirSim Interactive window.
The waveform will appear in Waveform window.
- If you can't see this kind of waveform, please check it again by using zoom function in the menu.