Inverter Circuit

M1 OUT IN VDD VDD CMOSP L=22n W=132n
M2 OUT IN 0 0 CMOSN L=22n W=44n
VDD VDD 0 1.8
VIN IN 0 0 PULSE 0 1.8 2n .5n .5n 7n 20n
CLOAD OUT 0 20fF

.OPTIONS LIST NODE POST
.TRAN 200p 20n
.PRINT TRAN V(IN) V(OUT)
.LIB "PTM_22nm_Metal_Gate_model" CMOS_MODELS     
.END