Welcome to VLSI Design World
The VTVT group develops tutorials for CAD tools and develops and distributes library cells. We also distribute source code for CAD tools for testing, which was developed under Prof. Dong Ha's supervision in early 90's. We hope our services are helpful to your class, research, and teaching. Please send us comments. to further improve our services. Here is the overview of the links.
Design Flow: It provides a description of the ASIC design flow adopted for the VTVT group, and the tools used during the process. Links to tutorials at each step of the design process are also available.
Tutorials: It provides detailed tutorials for some tools from Cadence and Synopsys including HSpice and SystemC. The tutorials also describe how to run these tools with our standard cell libraries.
Cell Libraries: It provides necessary information regarding our cell libraries such as how to receive and use our cell libraries.
CAD Tools: It provides necessary information to receive source for our CAD tools (two automatic test pattern generators and two fault simulators) along with some benchmark circuits.
Links: It provides useful links for VLSI design and CAD companies..